Online Course on VLSI Design –Timing Fundamentals

Online Course on VLSI Design –Timing Fundamentals

Date: 20th June 2020

Course Description:This is a live, online, instructor – led course which provides a thorough knowledge about the timing fundaments of digital circuits. They can name the basic techniques used to improve timing performance of digital circuits. Participants can also relate the theoretical concepts of timing constraints with practical circuits and summarize the necessity of such constraints. By applying the discussed techniques to practical examples, participants will be able to examine their differences so that they can choose and integrate suitable methods to solve problems in real designs..

Who can attend?

Post Graduate Students, under Graduate students, Faculty members and working professionals who are interested in design of Digital Systems using RTL for FPGA Design and –custom ASIC Design.

Target Audience: 


Pre-requisites:  Knowledge of Digital Circuits.

Faculty :  Shri Jayaraj U Kidav, Scientist D, Ex IBM, Ex DRDO Employee. He is having an experience of 18 years in the domain, he is principal investigator of many research and development project of Ministry of Electronics and Information technology. .

Course Duration  : 1 day (2 hours per day) - 20th June 2020 (Saturday)

Last date for payment and confirmation: 17-June-2020

Course Contents :

  • Introduction to Timing Analysis
  • Problems of Circuits: Race condition and hazard in combinational circuits.
  • Concept of flipflop-based design and setup and hold time constraints, clock period, frequency and static timing analysis.
  • Practical Examples of Setup and Hold time Violations and its solution.
  • Maximum clock frequency of a circuit.

Note  :Advanced Topics will be covered in VLSI Design-Timing Advanced (27th June 2020)

Certificate: e-Certificate of participation will be mailed to the registered email address after completion of the course.

Payment Guidelines:

Online fund transfer can be made via your Internet Banking / Google Pay to the following account and Proof of Deposit (counterfoil/acknowledgement in original) has to be uploaded during the registration. Proof of Deposit (counterfoil/acknowledgement in original)

Account details:

Name of the Institute: National Institute of Electronics and Information Technology, Calicut.

  • Account Holder: Director NIELIT Calicut
  • Account No: 10401158037
  • Bank Name: SBI, NIT Chathamangalam
  • Bank Code: 2207
  • IFSC No: SBIN0002207
  • MICR Code: 673002012

Course Fee :   1 day (2 hours)    INR 500/-

Last date for payment and confirmation: 17-June-2020

For any queries WhatsApp to 9447769756, Please don’t call, we will reply to you at the earliest.

Sreejeesh SG


Terms & Conditions

  1. In case any registered candidate could not attend the online session due to technical issue at their side there will not be any refund of the course fee and the sessions will not be repeated.
  2. In case the online course is cancelled /postponed due to some technical issue at NIELIT side and new date is not convenient to the candidate, our liability is limited to the refund of the course fee and NIELIT shall not be responsible for any consequential damages.

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