राष्ट्रीय इलेक्ट्रॉनिकी एवं सूचना प्रौद्योगिकी संस्थान ,कालीकट
National Institute of Electronics & Information Technology,Calicut
Chip Design Associate (O -Level Chip Design) - FIRST SELECTION LIST.
Application invited for Project Engineer (SMART LAB PROJECT) : Last Date: 02.07.2025.
Recruitment for the Posts of Senior Faculty, Faculty and FOC - NIELIT Chitradurga on contract.
GATE candidates to apply at CCMT portal - Institute Code - 450999.
National Institute of Electronics and Information Technology (NIELIT) is an autonomous body of Ministry of Electronics and Information Technology, Govt. of India.
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Come, join the NIELIT Calicut family, let’s work together for building Atmanirbhar Bharat.
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To be the single source for quality assurance in computer education among the nation's non-formal institutes, After turning
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Application invited for Project Engineer (SMART LAB PROJECT) : Last Date: 02.07.2025
Recruitment for the Posts of Senior Faculty, Faculty and FOC - NIELIT Chitradurga on contract
GATE candidates to apply at CCMT portal - Institute Code - 450999
Declaration of holiday on 7th June 2025 – reg
999.33 KBOffice Order dated 22 April 2025
342.43 KBOffice Order dt 28 Feb 2025
63.55 KBOffice Order dated 27 January 2025
752.55 KBOffice Order dt 17 Dec 2024
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NIELIT Calicut
Post Box No. 5, P. O. NIT Campus,
CALICUT – 673601,Kerala
Tel. : 0495-2287266, 2287166 ,
Fax : 0495-2287168
Reach Us on WhatsApp 9446711666
Email : mailto : info[at]calicut[dot]nielit[dot]in
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