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Online Course on System Design Using Verilog HDL
Online Course on System Design Using Verilog HDL
Date: 18th –20th May-2020
Course Description: This is a live, online, instructor – led course which provides a thorough introduction to the system design using Verilog HDL for FPGA Designing and ASIC Designing. This program comes with lectures and demos. The emphasis is on employing system design with Verilog HDL using Simulation Tools.
Who can attend?
Post Graduate Students, under Graduate students, Faculty members and working professionals who are interested in design of Digital Systems using RTL for FPGA Design and –custom ASIC Design.
Target Audience:
Professionals from EDUCATION, RESEARCHERS & STUDENTS
Pre-requisites: Knowledge of Digital Circuits.
Course Duration : 3 days (2 hours per day) Last date for payment and confirmation: 15-May-2020
Course Contents :
Introduction to Verilog HDL, Different Modelling Techniques in Verilog- Dataflow Modelling with Examples (Muxes, Adders, Flipflops, Counters) etc. Structural Modelling with Examples (Adder, Counters, and other Complex designs), Mini Project-System Design- Case Study
Certificate: e-Certificate of participation will be mailed to the registered email address after completion of the course.
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For any queries WhatsApp to 9447769756, Please don’t call, we will reply to you at the earliest.
For more details about our institution and facilities visit us
Website: http://nielit.gov.in/calicut
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